SLVS-EC RX IP Core for AMD FPGAs

SLVS-EC Interface for High-Speed Imaging

SLVS-EC (Scalable Low Voltage Signaling – Embedded Clock) is Sony’s high-speed image sensor interface. It enables fast, reliable, and low-complexity transmission of uncompressed image data from high-resolution sensors.

: Embedded Clock for improved signal integrity

High Throughput up to 12.5 Gbps per lane

Simplified PCB Design with fewer traces

Efficient Integration for edge devices and FPGAs

Extended Cable Lengths with robust CRC & error correction

Custom SLVS-EC image processing pipeline developed by FRAMOS

Built for High-Speed Sensor Integration

The FRAMOS IP Core handles byte-to-pixel conversion of the SLVS-EC image stream and outputs to a pixel-parallel bus. Built for AMD’s FPGA and SoC families, it supports SLVS-EC v1.2, v2.0, and v3.0 and integrates seamlessly with the FRAMOS Sensor Module Ecosystem.

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Compatible Sony Sensors

This IP Core supports a broad range of Sony image sensors using SLVS-EC versions 1.2, 2.0, and 3.0. It’s designed for high-resolution applications that require stable, high-throughput data transmission directly to AMD FPGAs.

The IP Core has been validated with multiple Sony sensors:

SLVS-EC 3.0 / 3.1.: IMX901, IMX902, IMX811

SLVS-EC 2.0 / 1.2: IMX411, IMX421, IMX530

This validation provides engineering teams with a known-good path for SLVS-EC integration – reducing risk and accelerating development.

Key Features

Easily integrate Sony’s SLVS-EC sensors with support for v2.0–v3.1, flexible 1–8 lane configurations, dynamic RAW formats, and robust data integrity features like CRC, ECC, and ROI overlap – optimized for seamless AMD FPGA deployment via AXI4-Lite.

The SLVS-EC RX IP Core includes the following features:

– Byte-to-pixel conversion for SLVS-EC v2.0, v3.0, and v3.1
– Tested with Sony IMX901, IMX530, IMX421, IMX411
– 1, 2, 4, or 8 lane configurations
– 8–16 bit RAW pixel formats
– AXI4-Lite configuration interface
– ROI overlap, CRC, ECC, and embedded data support
– Dynamic pixel format switching
– Optimized for AMD UltraScale™, UltraScale+™, Kria™, Versal™, and 7-Series

Reference Design Kit for SLVS-EC 3.0

FRAMOS offers a complete Reference Design Kit (RDK) to speed up development. It includes the full camera adapter, layout files, and streaming pipeline tested with IMX901 and compatible with IMX902 and IMX811.

: Electrical schematics + BOM

PCB layout files

Sensor board selected image sensor

FPGA interface and camera adapter hardware

Sample pipeline to convert SLVS-EC to parallel pixel interface (PPI)

SLVS-EC RX IP Core technical specifications table for AMD FPGAs

Expert Integration Support for SLVS-EC Receiver Designs

FRAMOS provides more than just IP cores – we support you throughout your SLVS-EC project with validated hardware kits, FPGA integration expertise, and tested compatibility with Sony sensors. Whether you’re building a prototype or deploying in production, we ensure reliable sensor interfacing and performance.

Built for Fast, Reliable Development

Reduces dev time and ensures AMD–Sony sensor compatibility

High-Speed Ready

Validated for SLVS-EC 3.1 and Sony’s latest sensors

FPGA-Optimized

Seamless integration with AMD Xilinx UltraScale, Kria™, and Versal™

Plug-and-Play Design

Includes both software IP and hardware kits for rapid evaluation

Lower Dev Costs

Eliminates the need for custom IP development

Tailored Solutions

Customization support for specific applications

Flexible Purchase Formats

SLVS-EC IP, Design Kit, and Evaluation Hardware – Use What You Need

Choose between the IP Core, reference files, or a full evaluation kit—each package is available separately or as a complete solution for faster integration.

SLVS-EC RX IP Core

Delivered electronically

Reference Design Kit

Includes schematics, layout, BOM + docs

Evaluation Kit

Full dev setup with sensor, adapter, and supporting documentation

Use them standalone or together for full integration support.

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SLVS-EC RX IP Core Specifications for FPGA Integration

Detailed technical parameters of the SLVS-EC RX IP Core, including supported SLVS-EC versions, lane configurations, pixel formats, and compatibility with AMD FPGA platforms like UltraScale™, Kria™, and Versal™.

Parameter	Specification
Standard Version	SLVS-EC v1.2, v2.0, v3.0
Control Interface	AXI4-Lite
Lanes Supported	1, 2, 4, 8
Baud Rates	1.2 / 2.5 / 5 / 10 Gbps
Pixel Formats	RAW 8–16 bits
Error Handling	CRC, ECC, ROI Overlap
Output Interface	Parallel Pixel Interface (PPI)
FPGA Support	UltraScale™, UltraScale+™, Kria™, Versal™

SLVS-EC Product Lineup

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Products

A list of available products with their attributes.

Product	Manufacturer	Product Type	Specification	Target Device Type
SLVS-EC RX IP Core Evaluation Kit Evaluation platform for SLVS-EC IP Core integration with full pipeline support and Sony sensor compatibility.	ManufacturerFRAMOS	Product TypeIP Core, Encrypted RTL, Time limited	SpecificationSupports Sony SLVS-EC up to v3.0 standard, Receiver FPGA module performing byte-to-pixel conversion from incoming SLVS-EC data stream	Target Device TypeFPGA, SoC, Supported AMD Architectures: 7-Series FPGA and SoC family, Ultrascale™ FPGA family, Ultrascale+™ FPGA and SoC family, Kria™ K26 SOM, Versal™ family	View Product
SLVS-EC RX IP Core Source Edition Source-editable IP Core for SLVS-EC sensor integration and advanced FPGA imaging workflows.	ManufacturerFRAMOS	Product TypeIP Core, Source Code (VHDL, Verilog)	SpecificationSupports Sony SLVS-EC up to v3.0 standard, Receiver FPGA module performing byte-to-pixel conversion from incoming SLVS-EC data stream	Target Device TypeFPGA, SoC, Supported AMD Architectures: 7-Series FPGA and SoC family, Ultrascale™ FPGA family, Ultrascale+™ FPGA and SoC family, Kria™ K26 SOM, Versal™ family	View Product
SLVS-EC RX IP Core AMD Encrypted Encrypted IP Core for integrating SLVS-EC Sony sensors into AMD Xilinx FPGA platforms.	ManufacturerFRAMOS	Product TypeIP Core, Encrypted RTL	SpecificationSupports Sony SLVS-EC up to v3.0 standard, Receiver FPGA module performing byte-to-pixel conversion from incoming SLVS-EC data stream	Target Device TypeFPGA, SoC, Supported AMD Architectures: 7-Series FPGA and SoC family, Ultrascale™ FPGA family, Ultrascale+™ FPGA and SoC family, Kria™ K26 SOM, Versal™ family	View Product
SLVS-EC v2.0 RX IP Core IP Core Source Code (VHDL) by FRAMOS GmbH: This VHDL-based IP Core is compatible with various sensors using Sony SLVS-EC v2.0. The receiver FPGA module performs byte-to-pixel conversion from the incoming SLVS-EC data stream. Compatible FPGA platforms include Xilinx Artix-7™, Kintex-7™, Zynq-7000™ SoC, Kintex UltraScale™, Kintex UltraScale+™, and Zynq UltraScale+™ MPSoC.	ManufacturerFRAMOS GmbH	Product TypeIP Core, Source Code (VHDL, Verilog)	SpecificationSupport Sony SLVS-EC v1.2 and v2.0	Target Device TypeFPGA, SoC	View Product
SLVS-EC v2.0 RX IP Core for Xilinx SLVS-EC v2.0 RX IP Core for efficient FPGA-based image processing	ManufacturerFRAMOS GmbH	Product TypeIP Core, Encrypted RTL	SpecificationSupport Sony SLVS-EC v1.2 and v2.0	Target Device TypeFPGA, SoC	View Product

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